Frequency detect circuit for determining sample speed mode of decoded audio input data streams

Abstract

Disclosed is a data converter and a method for converting a digital audio stream representing an analog signal that has been sampled at a certain rate. The circuit includes a divider that receives a clock signal associated with the digital audio stream and divides the clock signal by a selectable division factor. The division factor is set according to divider control signals. At the output of the divider is provided an internal clock signal. A frequency detection circuit receives the signal from the output of the divider, and the frequency detection circuit detects the original sampling rate of the audio signal based upon intrinsic characteristics (e.g., MCLK to LRCK ratio) of the digital audio stream. The frequency detection circuit, which may also be used with a separate rate detection circuit to accomplish its function, then generates the divider control signals to the divider to set the division factor in the divider such that the internal clock signal has a known relationship to the original sampling rate based on the sampling mode. A digital processing circuit then receives the internal clock signal from the divider, derives incoming data from the digital audio stream, and generates an output signal.