The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2003

Filed:

Oct. 26, 2001
Applicant:
Inventors:

Hong Zhang, Mountain View, CA (US);

William Robert Rypka, Red Bluff, CA (US);

Emy Tan, Cupertino, CA (US);

Mansour Izadinia, Los Altos Hills, CA (US);

Assignee:

Maxim Integrated Products, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01K 7/01 ;
U.S. Cl.
CPC ...
G01K 7/01 ;
Abstract

The present invention provides an improved method and apparatus to measure p-n junction device temperature by testing a device with M-Levels of applied collector current, sensing changes in output characteristics, and calculating the device current offset error and leakage current error due to parasitic parallel resistance where the leakage current error due to parasitic parallel resistance may be treated and eliminated as current offset error. Application of M levels of excitation values, where M is greater than or equal to four, eliminates device series parasitic effects, comprised of voltage offset and a series parasitic resistance, and parallel parasitic effects, comprised of current offset error and leakage current error due to parasitic parallel resistance, from temperature measurements. Since the operating characteristics of the device are temperature dependent, excitation levels applied and output values observed are used to determine junction temperature of the device free of series and parallel parasitic effects.


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