The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2003

Filed:

Oct. 05, 1998
Applicant:
Inventors:

Jeffrey J. Walker, Spokane, WA (US);

Greg W. Davis, Spokane, WA (US);

C Stuart Johnson, Liberty Lake, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/100 ;
U.S. Cl.
CPC ...
G06F 1/100 ;
Abstract

Method and apparatus for detecting signal transfer errors in a digital logic system that might occur in a transfer medium between a source device and a destination device. The method includes sending a first diagnostic signal of one or more bits from the source device through the transfer medium to the destination device; comparing the first diagnostic signal received by the destination device with a second diagnostic signal within the destination device to determine if a signal transfer error has occurred; inverting the first diagnostic signal; sending the inverted first diagnostic signal from the source device through the transfer medium to the destination device; and comparing the inverted first diagnostic signal received by the destination device with the second diagnostic signal to determine if a signal transfer error has occurred. Two embodiments of the invention are disclosed. To provide near real time detection without adding signal paths, the diagnostic signals are sent along established signal paths during a diagnostic clock cycle that is added to the normal clock cycles of the digital system.


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