The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2003

Filed:

Feb. 22, 2000
Applicant:
Inventors:

Yoichi Hijikata, Suwa, JP;

Makoto Kudo, Suwa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 ;
U.S. Cl.
CPC ...
G06F 1/04 ;
Abstract

An objective is to provide information processing device and electronic equipment that is capable of transferring data rapidly while using start-stop synchronization. A communication section ( ) comprised within a microcomputer ( ) comprises a frequency division circuit ( ) that divides a BCLK signal to generate an SMC signal (a clock signal for sampling each bit of data sent by start-stop synchronization) and a send/receive circuit ( ) for transmitting data based on SMC The communication section ( ) supplies the BCLK signal to a debugging tool ( ) as a signal for enabling a frequency division circuit ( ) to generate another signal SMC A division ratio control section ( ) changes a division ratio FD in accordance with the frequency of BCLK and transfers division ratio data to the communication section ( ), and the division ratio control section ( ) changes a division ratio FD in the frequency division circuit ( ) based on this division ratio data. This ensures that data can always be transferred at the most suitable fast communication speed. The BCLK signal can also be used as a sampling clock signal for trace data in user program execution mode.


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