The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2003

Filed:

Oct. 11, 2001
Applicant:
Inventor:

David Kwong, Fremont, CA (US);

Assignee:

Pericom Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/04 ;
U.S. Cl.
CPC ...
H02H 9/04 ;
Abstract

Large output driver transistors are used to shunt electro-static-discharge (ESD) pulses. ESD pulses are capacitivly coupled to the gates of the large driver transistors by R-C networks. The capacitive coupling causes a gate-to-source voltage to exceed the transistor threshold, turning on the large driver transistor to shunt the ESD current. Transistor switches are inserted into the R-C networks. These transistor switches disconnect the R-C networks during normal operation, and ensure that the R-C networks couple the I/O pad to the gates of the output driver transistors only when power is turned off. Since ESD events normally occur when power is disconnected, such as during handling by a person or machine, the ESD protection is only needed when power is off. Thus an active ESD-protection device can be disabled during normal powered operation of the IC. A feedback circuit detects power and biases the gates of the transistor switches.


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