The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 22, 2003
Filed:
Feb. 20, 2001
Method of polishing a stack of dielectric layers including a fluorine containing silicon oxide layer
Masazumi Matsuura, Tokyo, JP;
Kinya Goto, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A first layer metal wire, an SiOF film and an F diffusion prevention film are formed on a surface of a base layer including a substrate, elements formed on the substrate and an insulator layer formed to cover the substrate and the elements. The F diffusion prevention film may be prepared from a silicon oxynitride film or a silicon oxide film containing Si—H bonds. A spacer film is formed on a surface of the F diffusion prevention film and its surface is flattened. A second layer metal wire is formed on a surface of the spacer film. Thus implemented is a semiconductor device comprising an F diffusion prevention film preventing F atoms contained in an SiOF film from diffusing into an upper metal wire with the F diffusion prevention film not etched in formation of the upper metal wire and a method of manufacturing a semiconductor device not directly polishing an SiOF film by CMP.