The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 2003

Filed:

Jun. 13, 2000
Applicant:
Inventor:

Kensuke Torii, Fujimi-machi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A method of designing a semiconductor integrated circuit that makes it possible to reduce the manual work during the layout of power wiring. A first encircling power wire for supplying power to circuitry within a first circuit block, such as a memory block, is placed within that block. A second encircling power wire for supplying power to a random logic circuit block is placed to have a complicated shape, in order to avoid crossing the first encircling power wire. Two edges of the second encircling power wire are placed within the first circuit block. These two edges form a bent portion. By using these two edges for a portion that has a complicated shape of the second encircling power wire, it becomes possible to automate the routing of the other four edges of the second encircling power wire.


Find Patent Forward Citations

Loading…