The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2003
Filed:
Jul. 19, 2001
Applicant:
Inventors:
Kenji Suzuki, Kawasaki, JP;
Shogo Tajima, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/348 ;
Abstract
A semiconductor integrated circuit device in which wirings in different layers are connected electrically by vias and in which wiring width at a connection terminal is limited to the maximum width. A plurality of vias are arranged annularly in an area where a wiring in a lower layer and a wiring in an upper layer overlap. A pillar is generated in an area surrounded by the plurality of vias. Locating the pillar will narrow wiring width at a connection terminal for making interlayer connection. Furthermore, the plurality of vias arranged around the pillar will ensure a good connection.