The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2003
Filed:
Jul. 03, 2001
Yu Ju Chen, San Ramon, CA (US);
Hui Wu, Milpitas, CA (US);
BigBear Networks, Inc., Milpitas, CA (US);
Abstract
An apparatus and method for hermetically sealing, EMI shielding integrated circuits for high-speed electronic devices using a combination of microstrip to buried stripline interface for signal transmission from the integrated circuit. The packaging provided comprises a first plurality of microstrips interconnecting the integrated circuit to a plurality of buried striplines exposed on a surface of the main substrate. A ceramic interposer placed over the main substrate “buries” a portion of the exposed striplines on the main substrate to thereby insulate these signal paths from a hermetically sealing, and EMI shielding metal lid placed over the integrated circuit. The metal lid and the seal ring brazed over the ceramic interposer thus provide both a hermetic seal and an electric radiation block. A reduction in dispersion due to the buried striplines is also achieved, as well as improving jitter performance.