Method and system for improved data access

Abstract

A method and system which will increase the ability of memory controllers to intelligently schedule accesses to system memory. The method and system provide a memory controller and a requested memory operation buffer structured so that at least one source attribute of a requested memory operation can be identified. In one instance, the requested memory operation buffer has queues, associated with data buses, which can be utilized to identify source attributes of requested memory operations. Examples of such queues are an Accelerated Graphics Port Interconnect queue associated with an Accelerated Graphics Port interconnect, a system bus queue associated with a system bus, and a Peripheral Component Interconnect bus queue associated with a Peripheral Component Interconnect bus where the queues can be utilized by a memory controller to identify the specific bus from which a requested memory operation originated. In another instance, the queues, associated with data buses, are structured such that one or more further source attributes—such as the identity of the request initiator, the priority of the request, whether the request is speculative, etcetera—of particular queued requested memory operations can be identified. In yet another instance, the requested memory operation buffer is structured such that one or more source attributes—such as the identity of the request initiator, the priority of the request, whether the request is speculative, etcetera—of particular queued requested memory operations can be identified.