Atm cell switching system

Abstract

An ATM switching system including a switch unit having a plurality of input ports and output ports, and a multiplexer for multiplexing cell trains from at least two output ports into a single cell train and outputting the cell train to and output port. A demultiplexer can be provided in place of the multiplexer. The switch unit includes a buffer memory for storing cells from the input ports while forming a queue chain for each output port, a demultiplexer for distributing the cells from the buffer memory to output ports, and a buffer memory control circuit for controlling write and read operations of the buffer memory. The buffer memory control circuit has a control table for outputting an identifier of an output port the cells read from the buffer memory are to be output. Cells are read from the chain designated by the identifier.