Method of manufacturing a semiconductor device having a pocket implant in channel region

Abstract

In a method of manufacturing a semiconductor device comprising a semiconductor body ( ) of a first conductivity type which is provided at a surface ( ) with a transistor having a gate ( ) insulated from a channel ( ) provided at the surface ( ) of the semiconductor body ( ) by a gate dielectric ( ), a structure is provided on the surface ( ) comprising a dielectric layer ( ) having a recess ( ), which recess ( ) is aligned to a source zone ( ) and a drain zone ( ) of a second conductivity type provided at the surface ( ) of the semiconductor body ( ) and has side walls ( ) extending substantially perpendicularly to the surface ( ) of the semiconductor body ( ). In this recess ( ), a double-layer ( ) is applied consisting of a second sub-layer ( ) on top of a first sub-layer ( ), which second sub-layer ( ) is removed over part of its thickness until the first sub-layer is exposed, which first sub-layer ( ) is selectively etched with respect to the second sub-layer ( ) and the side walls ( ) of the recess ( ) to a depth, thereby forming trenches ( ) extending substantially perpendicularly to the surface ( ) of the semiconductor body ( ). Via these trenches ( ) impurities of the first conductivity type are introduced into the semiconductor body ( ), thereby forming pocket implants ( ).