Method and apparatus for increased performance of a parked data bus in the non-parked direction

Abstract

A distributed system structure for a large-way, symmetric multiprocessor system using a bus-based cache-coherence protocol is provided. The distributed system structure contains an address switch, multiple memory subsystems, and multiple master devices, either processors, I/O agents, or coherent memory adapters, organized into a set of nodes supported by a node controller. The node controller receives transactions from a master device, communicates with a master device as another master device or as a slave device, and queues transactions received from a master device. Since the achievement of coherency is distributed in time and space, the node controller helps to maintain cache coherency. In addition, a bus arbiter in the node controller parks a data bus towards a memory subsystem. The node controller does not use data buffer reservations. The data bus grant line to the memory controller is overloaded to use it as a back-pressure, get-off-the-bus signal as well as a normal data bus grant line. The fairness of the bus is thereby increased by creating a mechanism for getting a “parked” device off the data bus without the use of another dedicated signal between physical components. To ensure that the node controller may stream data to the memory subsystem, the bus is not reparked towards the memory subsystem until a configurable number of cycles after the data bus has been granted to the node controller.