The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2003

Filed:

Dec. 26, 2000
Applicant:
Inventor:

Steven J. Laureanti, Lewisville, TX (US);

Assignee:

Ericsson, Inc., Richardson, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/126 ;
U.S. Cl.
CPC ...
G01R 3/126 ;
Abstract

Virtual device fixturing is used to test transistor products, such as LDMOS power amplifier products, in the final packaging and testing stage of device fabrication. The input and output impedance transformation networks of a typical test fixture are implemented in software. The impedance matching function, normally performed by the physical input and output impedance transformation networks of the fixture, is supplanted by de-embedded scatter parameter calibration files. Test equipment, such as a vector network analyzer, attaches to a universal test fixture, while the software scatter parameter components are responsible for making the calibrations necessary to present the device under test with a matching low impedance.


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