The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2003

Filed:

Nov. 02, 2001
Applicant:
Inventors:

Sung-man Whang, Suwon, KR;

Hyung-moo Park, Seoul, KR;

Dong-cho Maeng, Yongin, KR;

Hyae-Ryoung Lee, Suwon, KR;

Ho-woo Park, Suwon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18238 ;
U.S. Cl.
CPC ...
H01L 2/18238 ;
Abstract

In a method of fabricating a metal oxide semiconductor (MOS) transistor with a lightly doped drain (LDD) structure without spacers, gate electrodes and spacers are formed on a semiconductor substrate. A high density source/drain region is formed using the gate electrodes and the spacers as masks. A low density source/drain region is formed after removing the spacers. It is possible to reduce the thermal stress of the low density source/drain region by forming the high density source/drain region before the low density source/drain region is formed and to increase an area, in which suicide is formed, by forming a structure without spacers. Also, it is possible to simplify processes of fabricating a complementary metal oxide semiconductor (CMOS) LDD transistor by reducing the number of photoresist pattern forming processes in the method.


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