The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2003
Filed:
Aug. 18, 1999
Ngyuyen Q. Nguyen, San Jose, CA (US);
Ali Alasti, Los Altos, CA (US);
Govind Malalur, Fremont, CA (US);
Ati International Srl, Barbados, KN;
Abstract
A method and apparatus for interfacing a bus with a plurality of input/output (I/O) devices includes steps for handling transactions to and from the I/O devices. Transactions from the I/O devices includes processing that begins by receiving the transactions, where each transaction is received at a rate corresponding to the providing I/O device. The processing continues by identifying, for each transaction, a corresponding section of memory for temporarily storing the transaction. The particular section of memory is identified based on the type of transaction and/or the identity of the I/O device. The processing then continues by storing each transaction in the identified section of memory when the section has an available entry. When the bus is available and a transaction has been selected, the selected transaction is provided to the bus at the rate of the bus. Processing of transactions directed towards the I/O devices includes steps for monitoring the bus during non-I/O bus intervals for transactions relating to one of the I/O devices. When a transaction is directed towards an I/O device, the transaction is interpreted to identify the particular I/O controller that supports the particular I/O device. The processing then continues by storing, at the bus rate, the transaction in the section of memory corresponding with the I/O device. Once stored in memory, the transaction is provided to an associated I/O controller, which processes the transaction at the rate of the corresponding I/O device.