The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2003
Filed:
Mar. 29, 2001
Applicant:
Inventor:
Hirotaka Nakano, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 ;
U.S. Cl.
CPC ...
G06F 1/04 ;
Abstract
One clock is selected from a plurality of clocks by a selector through programming. Clock lines are connected to the outputs of clock buffers connected to the selector. Programmable connector elements are connected onto these lines, and flip-flops and regulation loads are connected thereto. The programmable connector elements are selected through programming. This construction can realize a clock distributing circuit in a programmable logic device, which can suppress an increase in skew and can reduce a clock line wiring area.