The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2003

Filed:

Sep. 05, 2000
Applicant:
Inventors:

Sumant Ramprasad, Santa Ana, CA (US);

Sameer I. Bidichandani, Tustin, CA (US);

Assignee:

Conexant Systems, Inc., Newport Beach, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/206 ; G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/206 ; G06F 1/300 ;
Abstract

A circuit and method for reducing power in a memory, such as an instruction cache, having a number of blocks, are disclosed. A power reduction signal (also called a “same block” signal) is generated. The power reduction signal indicates whether a subsequent instruction to be fetched from an instruction cache belongs in the same block as a previous instruction fetched from the same instruction cache. When the subsequent instruction belongs to the same block as the previous instruction, there is no need to perform a tag read or an instruction read from an instruction cache other than the same instruction cache which contains the block to which the subsequent instruction belongs, whereby a tag from a tag memory bank is not read when the power reduction signal is in a first logical state.


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