The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2003
Filed:
Aug. 14, 2001
Bernhard H. Andresen, Dallas, TX (US);
Roger A. Cline, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An integrated circuit is provided with a local electrostatic discharge (ESD) protection circuitry ( ) associated with each signal pad. The integrated circuit has internal circuitry ( ) that operates at a low supply voltage, but at least some of the interface signals impressed on the signal pads operate at a high supply voltage. The local ESD protection circuitry associated with each signal pad comprises only a pair of diodes connected respectively to the ground reference bus and a high voltage supply bus. A few shared clamp circuits ( ) are connected to the voltage buses and clamp any ESD voltage surge that is transferred to the high voltage bus by the individual signal pad ESD protection circuits. The clamp circuits use cascoded low voltage MOS devices (P N P ) that are biased during normal operation so that electrical over-stress does not occur.