The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2003
Filed:
Mar. 14, 2001
Mika Shiiki, Chiba, JP;
Jun Osanai, Chiba, JP;
Seiko Instruments Inc., , JP;
Abstract
Ion implantation is conducted using contact holes of a MOS transistor as.a mask to form high concentration diffusion regions, whereby a MOS transistor having a medium withstand voltage structure is provided, in which a high drain withstand voltage, a small capacitance between a source/drain region and a gate electrode, and a high junction withstand voltage between a source/drain region and a channel stop region under a field oxide film are obtained, and the drain withstand voltage can be controlled. Low impurity concentration source and drain regions of a second conductivity type are formed in a semiconductor substrate surrounded by a field oxide film and a gate electrode. An interlayer insulating film is formed thereover for electrically insulating a gate electrode and the source and drain regions. A wiring layer is formed on the interlayer insulating film. A pair of contact holes are formed to extend through the interlayer insulating film to expose a portion of the source and drain regions for electrically connecting the wiring layer, the gate electrode, and the source and drain regions, and high impurity concentration diffusion layers of the second conductivity type are formed only in the exposed portion of each of the source and drain regions.