The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2003
Filed:
May. 16, 2001
Kanad Chakraborty, Bridgewater, NJ (US);
Maharaj Mukherjee, New Paltz, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of configuring partitions for different circuit or other operational areas on an integrated circuit initially identifies points representing components of an integrated circuit with respect to a coordinate system having a horizontal axis and a vertical axis, and subsequently creates a first isothetic rectangular partition containing all of the identified points of the integrated circuit. The method then continues by subdividing the first isothetic rectangular partition with respect to the horizontal axis by creating a plurality of isothetic rectangular sub-partitions collectively containing all of the identified points of the integrated circuit. Each of the isothetic rectangular sub-partitions is separated by a line parallel to the horizontal axis. These isothetic rectangular sub-partitions collectively encompass a minimum area containing all of the identified points. The method also includes subdividing the first isothetic rectangular partition with respect to the vertical axis by creating a plurality of isothetic rectangular sub-partitions collectively containing all of the identified points of the integrated circuit. Each of the isothetic rectangular sub-partitions is separated by a line parallel to the vertical axis. These isothetic rectangular sub-partitions collectively encompass a minimum area containing all of the identified points. The method then includes comparing the collective area of the isothetic rectangular sub-partitions subdivided with respect to the horizontal axis to the collective area of the isothetic rectangular sub-partitions subdivided with respect to the vertical axis, and determining which of the horizontally divided or vertically divided isothetic rectangular sub-partitions have the smaller area. The method includes configuring the operational area on the integrated circuit in conformance with the isothetic rectangular sub-partitions determined to have the smaller area.