Input/output system with mask register bit control of memory mapped access to individual input/output pins

Abstract

A processing device ( ) provides general-purpose input/output pins ( ) for use by software routines as needed. A data input register ( ) has bits corresponding to each pin ( ) for storing the value of the signal on the pin. A data output register ( ) has bits corresponding to each pin for driving the signal on the pin ( ) to a desired value. An output enable register ( ) controls output buffers ( ) coupled between the output register ( ) and the pins ( ). A plurality of mask registers ( ) may be individually set to define a set a pins associated with the mask. Each of the data registers, the data input register ( ), the data output register ( ) and the output enable register ( ) are accessed through a plurality of addresses, where the address specifies both the data register being accessed and an associated mask register ( ). Logic ( ) accesses the data registers in view of the state of the associated mask register ( ).