The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2003

Filed:

Feb. 23, 2001
Applicant:
Inventors:

Jean Louis Calvignac, Cary, NC (US);

Peter Irma August Barri, Bonheiden, BE;

Ivan Oscar Clemminck, St-Amandsberg, BE;

Kent Harold Haselhorst, Byron, MN (US);

Marco C. Heddes, Raleigh, NC (US);

Joseph Franklin Logan, Raleigh, NC (US);

Bart Joseph Gerard Pauwels, Tessenderlo, BE;

Fabrice Jean Verplanken, La Gaude, FR;

Miroslav Vrana, Ghent, BE;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

Network processors commonly utilize DRAM chips for the storage of data. Each DRAM chip contains multiple banks for quick storage of data and access to that data. Latency in the transfer or the 'write' of data into memory can occur because of a phenomenon referred to as memory bank polarization. By a procedure called quadword rotation, this latency effect is effectively eliminated. Data frames received by the network processor are transferred to a receive queue (FIFO). The frames are divided into segments that are written into the memory of the DRAM in accordance with a formula that rotates the distribution of each segment into the memory banks of the DRAM.


Find Patent Forward Citations

Loading…