The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2003
Filed:
May. 24, 1996
Applicant:
Inventors:
Assignee:
Infineon Technologies AG, Munich, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/900 ;
U.S. Cl.
CPC ...
H03B 1/900 ;
Abstract
A circuit configuration for generating an output signal orthogonal to an input signal includes a delay device having an input to which an input signal is applied, an output at which an output signal is available, and a control input for controlling a time lag. A multiplier device has inputs being coupled to the input and the output of the delay device and has an output. A device for low-pass filtering is connected between the output of the multiplier device and the control input of the delay device.
Quick Actions:
Veit, Werner. (2003). Circuit configurations having a delay device, a multiplier, filter and/or a master-slave flip-flop for generating: an output signal being orthogonal to an input signal, an output signal having a frequency being double that of an input signal, or two output signals being orthogonal to one another (U.S. Patent No. 6531904). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6531904
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile