The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6531661 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 11, 2003

Filed:

Jun. 14, 2001
Applicant:
Inventors:

Katsumi Uchikawa, Kawasaki, JP;

Keiji Arai, Kawasaki, JP;

Kazuhiko Iijima, Kawasaki, JP;

Naoto Maezawa, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/03 ;
U.S. Cl.
CPC ...
H05K 1/03 ;
Abstract

A multilayer printed circuit board is provided which includes a base member having a surface provided with a base wiring pattern, an inner buildup layer laminated on the base member and having a surface formed with an inner buildup wiring pattern, and an outer buildup layer laminated on the surface of the inner buildup layer and having a surface formed with an outer buildup wiring pattern. The wiring patterns are electrically connected to each other through vias. The inner buildup layer is formed of a resin material which is not reinforced by glass fibers, whereas the outer buildup layer is formed of a resin material reinforced by glass fibers.


Find Patent Forward Citations

Uchikawa, Katsumi. (2003). Multilayer printed circuit board and method of making the same (U.S. Patent No. 6531661). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6531661

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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