The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2003
Filed:
Oct. 12, 2001
Tien-Chu Yang, Hsinchu, TW;
Macronix International, Ltd., Hsinchu, TW;
Abstract
A method for forming a metal/dielectric multi-layered interconnect. A conductive layer is formed over a substrate. A protective film is formed over the conductive layer. A first high-density plasma fluorinated silica glass (HDP-FSG) layer is formed over the substrate by performing a HDP chemical vapor deposition with a low bias-voltage power. A second HDP-FSG layer is formed over the first HDP-FSG film by performing a HDP chemical vapor deposition at a higher bias-voltage power. A chemical-mechanical polishing is carried out to planarize the FSG layer. A silicon oxynitride is formed over the FSG layer. A via opening is formed in the FSG layer above the conductive layer. A barrier layer is formed onto the via opening and silicon oxynitride. Tungsten is deposited over the substrate filling the via opening. A tungsten chemical-mechanical polishing is carried out to remove excess tungsten and barrier layer above the silicon oxynitride layer.