The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2003
Filed:
Nov. 29, 2000
Mark W. Jennion, Chester Springs, PA (US);
Christina B. Kettlety, Oxford, PA (US);
Anthony P. Gold, Exton, PA (US);
Unisys Corporation, Blue Bell, PA (US);
Abstract
The invention provides a method, system, and computer-readable medium having computer-executable instructions for designing a PCB using both HDL design elements and schematic design elements. The inventive method comprises the steps of selecting the HDL design elements and selecting the schematic design elements. The inventive method further comprises automatically interconnecting the HDL design elements, and automatically interconnecting the schematic design elements. The PCB is then physically designed based on the interconnected HDL and schematic design elements. The method may further comprise creating a schematic version from the interconnected HDL design elements, and creating a HDL version from the interconnected schematic design elements. The inventive method also may simulate the schematic version of the HDL design elements, and simulate the HDL version of the schematic design elements. In either case, the non-logic portions of the HDL version and the schematic version are automatically removed before the simulation.