The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2003

Filed:

Nov. 02, 1999
Applicant:
Inventors:

Mark E Miller, Mission Viejo, CA (US);

David P Braun, Irvine, CA (US);

Assignee:

Conexant Systems, Inc., Newport Beach, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/312 ; G06F 3/00 ; G06F 1/324 ;
U.S. Cl.
CPC ...
G06F 1/312 ; G06F 3/00 ; G06F 1/324 ;
Abstract

In one embodiment, a single designated register in a codec is utilized by a controller to address and control a large number of expansion registers belonging to various expansion devices. The controller can write to or read from the designated register through an AC-link while complying with the AC '97 specification. The address and data bits in the designated register are used to write to or read from a target register in an expansion device. The designated register is selected from one of the registers available to a design engineer in accordance with the AC '97 specification. An example of an expansion device that can be addressed and controlled through the designated register is an SSD device. In another embodiment, two designated registers in the codec register set are utilized. The controller can write address information into one of the designated registers while complying with the AC '97 specification. The controller can also write data to or read data from the other designated register through the AC-link while complying with the AC '97 specification. The address and data bits in the designated registers are used to write to or read from a target register in an expansion device. The two designated registers are selected from the 16 registers available to a design engineer in accordance with the AC '97 specification.


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