The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2003

Filed:

Mar. 08, 2002
Applicant:
Inventors:

John E. Andersen, Essex Junction, VT (US);

Louis Lu-Chen Hsu, Fishkill, NY (US);

Li-Kong Wang, Montvale, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/100 ;
U.S. Cl.
CPC ...
G11C 1/100 ;
Abstract

A stacked block array architecture.for a SRAM memory for low power applications. The architecture turns on only the required data cells and sensing circuitry to access a particular set of data cells of interest. The wordline delay is reduced by using a shorter and wider wordline wire size. Although less power is consumed, the performance is improved by the reduction in loading of wordlines and bitlines.


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