The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2003
Filed:
Dec. 31, 2001
Applicant:
Inventors:
Thomas M. Luich, Puyallup, WA (US);
David Byrd, Puyallup, WA (US);
Assignee:
Jet City Electronics, Inc., Seattle, WA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/9788 ;
U.S. Cl.
CPC ...
H01L 2/9788 ;
Abstract
An Electrically Erasable Programmable Read Only Memory (EEPROM) cell uses a single standard NMOS (or PMOS) transistor with its gate connected to a Metal-Insulator-Metal, or Poly-Insulator-Poly capacitor such that a floating gate is formed. The floating gate is programmed and erased via Fowler-Nordheim tunneling.
Luich, Thomas. (2003). Electronically erasable memory cell using cmos technology (U.S. Patent No. 6528842). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6528842
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile