The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2003
Filed:
Apr. 01, 2002
Harumi Mizunashi, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A packaged semiconductor device comprises a packaging substrate having a core substrate having core wiring layers formed on opposite surfaces thereof, respectively, and a plurality of core via holes in the core substrate for mutually electrically connecting the core wiring layers formed on the opposite surfaces of the core substrate. Upper and lower buildup layers, each having a wiring layer, are formed on an upper surface and a lower surface of the core substrate, respectively. A semiconductor device chip is mounted on mounting pads formed on the upper buildup layer, and externally connecting electrodes are formed on the lower buildup layer. The position of the core via holes in the core substrate is standardized, regardless of the size of semiconductor device chip to be mounted. When a semiconductor device chip having a different chip size, the mounting pads formed on the upper buildup layer are located to coincide connection terminals of the semiconductor device chip of the different kind to be mounted.