The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2003
Filed:
Mar. 12, 1999
Masayuki Dojo, Tokyo, JP;
Akira Kubo, Tokyo, JP;
Kabushiki Kaisha Toshiba, Kanagawa-ken, JP;
Abstract
In the manufacturing method of array substrates for use in flat panel display devices including liquid crystal display (LCD) devices, it is aimed to prevent failure of interlayer dielectric film due to wiring deformation or the like while reducing the resistivity of wiring. It is also aimed to prevent corrosion of a metal wiring layer at the etching process and to thereby prevent deterioration of production yield due to corrosion. According to the method of the invention, to form scanning lines ( ), an aluminum-neodymium alloy (Al-Nd) film ( ) is deposited in 300 nm thickness on the first hand, and then 50 nm thick Mo film ( ) is deposited thereon. Subsequently, gate insulator films ( and ) are formed by CVD processes at a substrate temperature of 350° C. Further, an etching process for forming pixel electrode ( ) is carried out by HBr, HI, Oxalic acid or a mixture liquid containing at least one of these acids.