The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2003

Filed:

Oct. 26, 2000
Applicant:
Inventors:

Chirag S. Patel, Peekskill, NY (US);

Kevin Martin, Atlanta, GA (US);

James D. Meindl, Marietta, GA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
Abstract

Compliant wafer level packages and methods for monolithically fabricating the same. A monolithically fabricated compliant wafer level package having a compliant layer and a compliant interconnect passing therein. The compliant interconnects being provided so that electrical and mechanical connections may be supported across the compliant layer , and constructed so that stresses related to relative motion between electrical components is accommodated. A method of providing a substrate having a compliant layer , the compliant layer having a via that exposes a die pad on the substrate . Fabricating a compliant interconnect so that the compliant interconnect contacts the die pad . The compliant interconnect constructed so that electrical and mechanical connections may be supported through the compliant layer


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