The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 2003
Filed:
Dec. 12, 2001
Applicant:
Inventors:
Farshid Shokouhi, San Jose, CA (US);
Michael G. Ahrens, Sunnyvale, CA (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract
A one-shot system for loading a bitline shift register with a typical test pattern is described. Each bitline latch within the bitline shift register is augmented with a one-shot circuit that may pull-up or pull-down the value stored in the bitline latch. The choice of a particular memory test pattern dictates the control of the one-shot circuit.
Shokouhi, Farshid. (2003). Automatic bitline-latch loading for flash prom test (U.S. Patent No. 6525973). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6525973
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile