The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2003

Filed:

Jan. 16, 2001
Applicant:
Inventors:

Kerry Bernstein, Underhill, VT (US);

John M. Cohn, Richmond, VT (US);

Jose L. P. Neves, Wappinger Falls, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A method and a related program storage product for adding decoupling capacitance in an integrated circuit during the floor planning stage of the integrated circuit design. The invention overlay a power grid on the floor plan and then divides the power grid into regions or macros. For each region or macro, a support decoupling capacitance value required to support a voltage of the power grid and a native capacitance value are determined. Based on those values, a required decoupling capacitance value along with its decoupling capacitance area is determined. The design is then alternated based on the decoupling capacitance area.


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