The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2003

Filed:

Jan. 28, 1999
Applicant:
Inventors:

Atul Ajmera, Wappingers Falls, NY (US);

Effendi Leobandung, Wappingers Falls, NY (US);

Werner Rausch, Stormville, NY (US);

Dominic J. Schepis, Wappingers Falls, NY (US);

Ghavam G. Shahidi, Elmsford, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/701 ;
U.S. Cl.
CPC ...
H01L 2/701 ;
Abstract

A method for forming a substrate contact in a substrate that includes a silicon on insulator region. A shallow isolation trench is formed in the silicon on insulator substrate. The shallow isolation trench is filled. Photoresist is deposited on the substrate. A contact trench is formed in the substrate through the filled shallow isolation trench, silicon on insulator, and silicon substrate underlying the silicon on insulator region. The contact trench is filled, wherein the material filling the contact trench forms a contact to the silicon substrate.


Find Patent Forward Citations

Ajmera, Atul. (2003). Method of integrating substrate contact on soi wafers with sti process (U.S. Patent No. 6521947). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6521947

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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