The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2003

Filed:

May. 04, 1999
Applicant:
Inventor:

Kenji Kohya, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/03 ;
U.S. Cl.
CPC ...
H05K 1/03 ;
Abstract

A multilayer printed circuit board enables needless electro-magnetic radiation to be suppressed. Interlayer insulation materials are arranged in layer-built constitution between respective layers of a mixed wiring layer of a first signal and/or a power supply wiring, a first ground layer, a second ground layer, and a mixed wiring layer of a second signal and/or a power supply wiring. A through-hole for connecting the ground layers with each other is provided adjacently to a through-hole for connecting the signal and/or the power supply between these layers. According to the constitution, a return circuit current route of the signal and the power supply to the ground layers is secured. As a result, a loop made by the current becomes small, thus needless radiation of electro-magnetic wave is capable of being suppressed.


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Kohya, Kenji. (2003). Multilayer printed circuit board having signal, power and ground through holes (U.S. Patent No. 6521843). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6521843

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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