The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2003
Filed:
Sep. 29, 2000
Applicant:
Inventors:
Wei G. Lu, San Jose, CA (US);
Biranchi N. Nayak, San Jose, CA (US);
Assignee:
S3 Incorporated, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/200 ;
U.S. Cl.
CPC ...
G06F 1/200 ;
Abstract
In a synchronized memory system comprising a memory controller externally coupled to a synchronous memory, a read valid loop back signal is introduced for the memory controller to track the delays of signals exchanged between the memory controller and the synchronous memory, so that the uncertainty introduced by I/O pads and PCB traces used to facilitate the coupling of the memory controller with the sychronous memory is no longer the limiting factor for the speed of the memory controller. An asynchronous FIFO buffer is used to latch read data returned by the synchronous memory based on the read valid loop back signal.