The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2003

Filed:

Dec. 04, 2000
Applicant:
Inventor:

Douglas Blaine Butler, Colorado Springs, CO (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 ;
U.S. Cl.
CPC ...
G05F 1/10 ;
Abstract

A driver timing and circuit technique for a low noise charge pump circuit of particular applicability with respect to integrated circuit devices requiring voltage levels either more positive than or more negative than, externally supplied voltages. In accordance with the technique of the present invention, the pump capacitor is driven “high” by one transistor and “low” by another. By correctly sizing the devices driving them, each transistor can be turned “off” quickly and “on” slowly and, in an alternative embodiment, both transistors may be “off” at the same time resulting in “tri-state” operation. Timing is set such that both transistors are “off” when a third transistor connecting the intermediate node to the power supply is turned “on” and when a fourth transistor connecting the intermediate node to the pumped supply is turned “on” thereby preventing large dI/dt and resultant noise on the power supply sources.


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