The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 2003
Filed:
Feb. 26, 2001
Jeff Erhardt, San Jose, CA (US);
Khoi Phan, San Jose, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A method for new product mask evaluation is provided. Focus exposure matrices are printed at one or more layers (e.g., active gate) on full flow production wafers. The focus exposure matrices are then analyzed to produce data that facilitates detecting printed defects. The full flow production wafers are also subjected to end of line electrical testing to determine bit level errors. Print defects can be correlated with bit level errors to increase confidence in detected defects. The method includes a hierarchy of testing layers, each of which produce data that can be employed in detecting defects in a reticle and/or producing a yield analysis. The method involves scanning a reticle upon which the new product mask is etched and performing a printability simulation to determine what affect, if any, detected reticle defects will have on printing defects on a wafer. After the reticle is scanned, full flow production wafers printed from the pattern on the reticle can be scanned for defects, as can resist-on-silicon flat test wafers, where a higher signal to noise ratio facilitates detecting defects that may otherwise not be detected. The reticle scanning can include critical dimension measuring by scanning electron microscopy means and/or scatterometry means.