The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 2003
Filed:
Jun. 06, 2000
Isao Nakatsu, Kanagawa, JP;
Atsuko Kozai, Kanagawa, JP;
NEC Corporation, Tokyo, JP;
Abstract
The present invention provides a semiconductor integrated circuit device, a layout design method and apparatus thereof which enable to select an arbitrary number of grids in primitive cells and minimize the layout area. Each primitive cell is constituted by a core portion having a circuit for realizing a function inherent to the primitive cell and a power supply wiring portion for electrical connection between the core portion and a power supply wiring and electrical connection between cores of different primitive cells. A primitive cell small group is prepared from a plurality of primitive cells having an identical core portion and different numbers of allocatable signal lines in the power supply wiring portion, so that a primitive cell having an appropriate number of signal lines as the power supply wiring portion is selected for layout.