The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2003

Filed:

Nov. 30, 1999
Applicant:
Inventors:

Chi-Lie Wang, Sunnyvale, CA (US);

Eric Davis, Sunnyvale, CA (US);

Nathan Henderson, San Jose, CA (US);

Jeffrey Ross, San Jose, CA (US);

Assignee:

3COM Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 ; G06F 1/32 ;
U.S. Cl.
CPC ...
G06F 1/04 ; G06F 1/32 ;
Abstract

The present invention allows NIC resources to be accessed through auxiliary power and an ASIC clock while the PC is powered down and while PCI power and the PCI clock are not available. The present invention also provides an alternate path for accessing the NIC registers, downloading keep-alive and alert-on-LAN packets to the transmit packet buffer (TPB), as well as uploading received packets from the receive packet buffer (RPB). The present invention also allows monitoring PCI activity and seamlessly servicing the PCI configuration cycle (when PCI power and the PCI clock are restored) in conjunction with responding to the access through the alternate path (while PCI power and the PCI clock are not available).


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