The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2003

Filed:

May. 20, 1999
Applicant:
Inventors:

James M. Knittel, Groton, MA (US);

Stephen R. Burgess, Medfield, MA (US);

Kenneth W. Correll, Lancaster, MA (US);

Jan C. Hardenbergh, Sudbury, MA (US);

Christopher J. Kappler, Charlestown, MA (US);

Hugh C. Lauer, Concord, MA (US);

Stephen F. Mason, Roanoke, VA (US);

Takahide Ohkami, Newton, MA (US);

William R. Peet, Billerica, MA (US);

Hanspeter Pfister, Somerville, MA (US);

Beverly J. Schultz, Ayer, MA (US);

Jay C. Wilkinson, Newton, MA (US);

Assignee:

TeraRecon, Inc., San Mateo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 1/700 ;
U.S. Cl.
CPC ...
G06T 1/700 ;
Abstract

A volume rendering integrated circuit includes a plurality of interconnected pipelines having stages operating in parallel. The stages of the pipelines are interconnected in a ring, with data being passed in only one direction around the ring. The volume integrated circuit also includes a render controller for controlling the flow of volume data to and from the pipelines and for controlling rendering operations of the pipelines. The integrated circuit may further include interfaces for coupling the integrated circuit to various storage devices and to a host computer.


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