The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2003

Filed:

Mar. 29, 1999
Applicant:
Inventors:

Vikram Chopra, Pune, IN;

Ajay Desai, Pune, IN;

Raghunath Iyer, Los Altos, CA (US);

Sundar Iyer, Palo Altos, CA (US);

Moti Jiandani, Fremont, CA (US);

Ajit Shelat, Pune, IN;

Navneet Yadav, Pune, IN;

Assignee:

PMC-Sierra US, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/500 ;
U.S. Cl.
CPC ...
G06F 1/500 ;
Abstract

A high-speed rule processing apparatus is disclosed that may be used to implement a wide variety of rule processing tasks such as network address translation, firewall protection, quality of service, IP routing, and/or load balancing. The high-speed rule processor uses an array of compare engines that operate in parallel. Each compare engine includes memory for storing instructions and operands, an arithmetic-logic for performing comparisons, and control circuitry for interpreting the instructions and operands. The results from the array of compare engines is prioritized using a priority encoding system.


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