The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 14, 2003
Filed:
Dec. 22, 1998
Kazumasa Chigira, Kiryu, JP;
Tsunehiko Yatsu, Tatebayashi, JP;
Kazuo Hotaka, Hanyu, JP;
Norimasa Kanahori, Ashikaga, JP;
Sanyo Electric Co., Ltd., Osaka, JP;
Abstract
A selection circuit causes either a memory H or L to enter an enabled state according to address data A of address data A -A when a mode signal M is 1. The selection circuit comprises OR gates ( ) which output different outputs. When the address data A is 0, a nonvolatile memory L enters an enabled state. Then, the memory L is addressed according to the address data A -A so that, for example, 8-bit lower data is written therein. On the other hand, when the address data A is 1, a nonvolatile memory H becomes in an enabled state. Then, the memory H is addressed according to the address data A -A so that, for example, 8-bit upper data is written therein. Also, when an external terminal ( ) is grounded, and a mode signal become 0, the OR gates ( ) outputs signals 0, so that the memories H, L simultaneously become in an enabled state. When data is read from corresponding addresses of each memory, data of, for example, 16-bits is obtained.
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