Lateral high-voltage sidewall transistor

Abstract

A lateral high-voltage sidewall transistor configuration includes a low-doped semiconductor substrate of a first conductivity type and a low-doped epitaxial layer of a second conductivity type disposed on the semiconductor substrate. First semiconductor layers of the first conductivity type and second semiconductor layers of the second conductivity type are disposed in an alternating configuration in the epitaxial layer. A source region and a drain region of the second conductivity type extend through the first and second semiconductor layers as far as the semiconductor substrate. A gate electrode includes a gate insulating layer lining a gate trench and includes a conductive material which fills the gate trench. The gate electrode extends through the first and second semiconductor layers as far as the semiconductor substrate and is disposed adjacent to the source region toward the drain region. A semiconductor region of the first conductivity type is disposed on at least one side of the source region and the gate trench, the semiconductor region extending as far as the semiconductor substrate and extending under the source region and partially under the gate insulating layer.