Method of forming connections with low dielectric insulating layers

Abstract

In a semiconductor manufacturing method, etching control is provided by introducing a material containing a material having at least one of an —H, —C, —CH, —CH , and —CH radical component, e.g., Si—O—C, in a lower portion or layer of a dielectric layer formed during a semiconductor manufacturing process. A semiconductor device made by the method includes a first dielectric layer of a material having a given amount of carbon formed on the semiconductor substrate, and a second dielectric layer of a material having a lesser amount of carbon formed on said first dielectric layer wherein the second dielectric layer has an etched pattern formed by etching the second dielectric layer to a depth determined by etching resistance of first dielectric layer. Aspects of invention are particularly useful for making a dual or single damascene structure in a semiconductor device where better control of etching depth is required for via holes and conductive lines in the semiconductor structure.