The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2003

Filed:

Sep. 25, 2000
Applicant:
Inventor:

Tomonori Okudaira, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 7/06 ;
U.S. Cl.
CPC ...
H01G 7/06 ;
Abstract

An object is to provide a method for manufacturing a semiconductor device in which the value of dielectric loss tangent of the dielectric film forming a storage capacitor is reduced to prevent dielectric loss of stored charge in the storage capacitor. After formation of a stacked capacitor (SC), a silicon substrate ( ) is rapidly heated in a nitrogen atmosphere to 500 to 800° C. with, for example, lamp heating, to apply an RTA (Rapid Thermal Annealing) for about 3 to 60 seconds. Subsequently, in order to recover the breakdown voltage reduced in the RTA, the silicon substrate ( ) is heated to 300 to 550° C. in an oxidative gas to apply an annealing for 30 minutes to 6 hours.


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