The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2003
Filed:
Jul. 15, 1998
Costas Papadopoulos, Acton, MA (US);
David J. Truesdell, Acton, MA (US);
VXI Corporation, Rollinsford, NH (US);
Abstract
An electret microphone circuit including an electret microphone having a field effect transistor (FET) with a gate coupled to an electret diaphragm, a drain coupled to provide audio frequency output to an audio output node, a source terminal coupled to ground, and an amplifier stage with an RLC circuit coupled to the drain for configuring the audio frequency output to desired characteristics and for obtaining microphone bias from the output node. The amplifier stage can comprise discrete transistors or integrated operational amplifiers. In another embodiment of the invention there is provided a transistor with a drain coupled to provide audio frequency output to an audio output node and for obtaining microphone bias am from said output node, a source terminal coupled to the microphone housing, and an NPN transistor current mirror stage with an RC or RLC circuit coupled to the source for configuring the audio frequency output to desired characteristics. In yet another embodiment of the invention there is provided a transistor with a source terminal coupled to ground, and an PNP transistor current mirror stage with an RC or RLC circuit coupled to the drain for configuring the audio frequency output to desired characteristics and for obtaining microphone bias from the output node. In one aspect of the invention, the PNP current mirror with RLC circuit is provided with means for adding batteries optionally and is followed by a diode and capacitor coupling network to accept bias current optimally from the output node.