The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2003
Filed:
Dec. 18, 2000
Tsuyoshi Hirakawa, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
To provide a semiconductor memory device that can ensure adequate read margin by effectively utilizing a period for assigned CAS latency. CAS latency is preset before reading. An ACT command is input to activate a word line corresponding to a row address. A READ command is input at a zeroth clock pulse of an internal clock and a digit line corresponding to a column address is connected to a sense amplifier. A sense amplifier activation signal is activated independently of CAS latency to start an equalizing and sense operation. Afterwards, a sense amplifier activation signal is deactivated after two through 5 cycles depending on CAS latency, and the equalizing and sense operation are terminated. Subsequently, an output operation for transferring the sensed result from the sense amplifier to an output pin is performed, and first data is available from a fifth through the eighth clock pulse depending on CAS latency.